This application is based on and incorporates herein by reference Japanese Patent Application No. 2002-67161 filed on Mar. 12, 2002.
1. Field of the Invention
The present invention relates to an A/D conversion method of converting analog signals into digital signals, and to an apparatus therefor.
2. Background of the Invention
As an A/D conversion unit which is simple in construction and is capable of producing digital values of high resolution, has been disclosed in, for example, U.S. Pat. No. 5,834,636 (JP-A-5-259907). In this conversion unit, an analog signal to be subjected to the A/D conversion is fed as a power-source voltage to a delay line formed by connecting a plurality of delay elements of various gate circuits like a ring. A pulse signal to be transmitted is input thereto so as to circulate through the delay line at a speed corresponding to the delay times of the delay elements. The number of delay elements through which the pulse signal has passed in the delay line within a predetermined period of time is counted while the pulse signal is circulating, thereby to convert the analog signal into a digital value.
This A/D conversion unit utilizes a change in the delay times of the delay elements depending upon the power-source voltage. Upon supplying an analog signal as a power-source voltage to the delay elements that constitute the delay line, the moving speed of a pulse signal circulating through the delay line is modulated with the analog signal and is measured by counting the number of delay elements through which the pulse signal has passed within a predetermined period of time. The measured result (counted value) is output as a digital value after the A/D conversion.
According to this A/D conversion unit, the voltage resolution of the obtained digital value can be set depending upon the time of measuring the number of the delay elements through which the pulse signal has passed along the delay line. To enhance the voltage resolution of a digital value which is the result of A/D conversion, the time for the A/D conversion may be lengthened. It is therefore possible to provide an A/D conversion unit capable of realizing a highly precise A/D conversion in a simple construction and at a low cost.
However, the above A/D conversion unit is the integration type which makes it possible to enhance the voltage resolution of the obtained digital value with an increase in the A/D conversion time. Therefore, the digital value that is obtained is the one obtained by integrating the fluctuation components of the analog signals.
When the analog signal to be A/D-converted undergoes the fluctuation in the above A/D conversion unit, therefore, the amount of fluctuation could not be reflected in the obtained digital value. Therefore, the A/D conversion unit could not be used for the A/D conversion apparatus that requires high speed and high resolution like the A/D conversion apparatus disclosed in, for example, U.S. Pat. No. 5,396,247 (JP-A-9-21344).
That is, in order to obtain a digital value of high resolution, if the above integration-type A/D conversion unit is used for the above A/D conversion apparatus which subjects the signals from a knock sensor to the A/D conversion at every predetermined interval and subjects the signals from the air-flow sensor to the A/D conversion every time when the engine crankshaft turns by 10 degrees, then, it becomes no longer possible to normally execute the A/D conversion when the time used for the A/D conversion is shortened like when the engine is rotating at a high speed.
In the above integration-type A/D conversion unit, the time used for the A/D conversion may be shortened when it is attempted to execute the A/D conversion at high speeds. If the time is shortened, however, there arises a problem in that the voltage resolution of the obtained digital value becomes rough and the precision of the A/D conversion can not be maintained.
For the A/D conversion apparatus that requires the A/D conversion speed and precision, therefore, an expensive sequential comparison-type or parallel-type A/D conversion unit having a construction more complex than the above integration-type A/D conversion unit is used. This hinders the effort for realizing the A/D conversion apparatus in small size and at decreased cost.
The present invention therefore has an object of providing an A/D conversion method by using an A/D conversion unit which is simply constructed and which converts analog signals into digital signals at high speed and high precision, as well as to provide an apparatus therefor.
According to the present invention, an A/D conversion apparatus includes four A/D conversion units. Each unit comprises ring delay lines, pulse selectors for detecting the positions reached by pulse signals in the ring delay lines, encoders for converting the reached positions that are detected into ma-bit digital values, mb-bit counters for counting the number of times the pulse signals have circulated through the ring delay lines, and latch circuits for latching the results counted by the counters. A control circuit sends digital values obtained from the A/D conversion units to a signal processing circuit which adds up together the digital values to calculate a digital value having the number of bits larger than that of the initial digital value.